A New Multilevel Inverter Design with Reduced Power Electronic Components for Three Phase Grid Connected System Arthy G.*, Dr. Marimuthu C. N.** *Assistant Professor, Sri Shakthi Institute of Engineering and Technology, Chinniyampalayam, Coimbatore, TamilNadu, India **Dean & Professor, Nandha Engineering College, Perundurai, Erode, TamilNadu, India Online published on 9 November, 2016. Abstract In this paper a new topology for multi level inverter has been proposed with reduced number of switching devices in the inverter and eliminates the use of anti parallel diodes across every switch. The proposed topology is designed to generate a five level inverter output voltage using center-tapped primary winding transformer with common DC supply. Also using this topology, the number of three phase transformers was reduced which helps to achieve a compact size inverter. The grid synchronization is tightly regulated using Space Vector pulse width modulation (SVPWM) and therefore the quality of power is enhanced by improving the power factor (PF) and reducing the total harmonic distortion (THD). Also the usage of anti-parallel diodes has been eliminated, which reduces the total power loss when compared to other existing topologies. Due to the reduction in switches the switching loses are also reduced. Top Keywords Multi Level Inverter, Center Tapped Transformer, PV Module, MPPT, THD. Top |