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Hamming Error Detection using triple Adjacentcode Algorithm Praveen J. S.1, Amutha A.2 1Research and Development Division, AMET University, Chennai. Tamilnadu, India 2Assistant Professor, Department of Information Technology, AMET University, Chennai. Tamilnadu, India Online published on 14 May, 2018. Abstract Error detection and correction codes provide reliable delivery of information signals. In general, these types of errors are generated in RAM chips [Error detection]. These errors can be detected and corrected by employing the error-detecting and error-correcting codes in RAMs. The most generalized scheme for detecting the error in error detecting technique is parity bit. In Single Error Correction-Triple Adjacent Error Detection (SEC-TAED) method, the parity bit can be extended to detect a single error as well as triple adjacent errors. Hence, SEC-TAED based hamming code is referred to as “Extended Hamming SEC-TAED codes.” Hence, 82% of detection efficiency can be achieved in modified bit-reordered based SEC-TAED process. Top Keywords SEC-TAED, Hamming. Top | |
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